1. Field of the Invention
The present invention relates to a metal wiring and its manufacturing method using a thin film technology. Further, the invention relates to a metal wiring substrate (a substrate having metal wirings thereon) and its manufacturing method.
2. Description of the Related Art
In recent years, a development of a semiconductor device having a large area integrated circuit, comprising thin film transistors (TFTs) is progressing, the TFT being formed by using a semiconductor thin film (several to several hundreds of nm in thickness) deposited over a substrate with an insulating surface. An active matrix liquid crystal display device, a light emitting device, and a close contact type image sensor are known as typical examples. In particular, since the TFT using a crystalline silicon film (typically, a polysilicon film) as an active region (hereinafter referred to as polysilicon TFT) has a high field effect mobility, it can be also used for forming various functional circuits.
For example, in the active matrix liquid crystal display device, there are formed on a single substrate, at least a pixel portion for performing image display on respective functional blocks and driver circuits such as a shift register circuit, a level shifter circuit, a buffer circuit, a sampling circuit, and the like, which are based on a CMOS circuit for controlling the pixel portion.
In the pixel portion of the active matrix liquid crystal display device, a plurality of TFTs (pixel TFTs) are disposed at several hundred thousands to several millions of pixels, respectively, and pixel electrodes are provided to the pixel TFTs, respectively. A counter electrode is provided on the side of an opposing substrate, the substrate and the opposing substrate interposing liquid crystal therebetween. Thus, a portion functioning as a capacitor which uses the liquid crystal as a dielectric is formed. Then, a voltage applied to each pixel is controlled by a switching operation of the TFT to control a charge of the capacitor, whereby the liquid crystal is driven. As a result, it is constructed such that an image is displayed by controlling an amount of transmission light.
The pixel TFT is generally of an n-channel type, and is used as a switching element for applying a voltage to the liquid crystal and driving it. Since the liquid crystal is driven by an alternating current, a system called a frame inversion drive is employed in many cases. In this system, in order to keep consumption power low, it is important that an off-current value (drain current flowing when the TFT is in an off-operation) is sufficiently kept low as a characteristic required for the pixel TFT.
A low concentration drain (lightly doped drain (LDD)) structure is known as a TFT structure for reducing the off-current value. This structure is made by providing a region, to which an impurity element is added at a low concentration, between a channel forming region and a source region or a drain region, to which the impurity element is added at a high concentration, and this region is referred to as an LDD region. Further, a so-called GOLD (gate-drain overlapped LDD) structure in which the LDD region is disposed so as to overlap a gate electrode through a gate insulating film is known as means for preventing a reduction in an on-current value due to a hot carrier. It is known that such a structure mitigates a high electric field near the drain region to prevent a hot carrier injection and is therefore effective to prevent a degradation phenomenon.
A brief description is given below on how the GOLD structure is obtained. A base insulating film is formed on a substrate, a semiconductor film is formed on the base insulating film, an insulating film is formed on the semiconductor film, and a conductive film is formed on the insulating film. Subsequently, resist is formed and the conductive film is etched so that the conductive film is tapered around the edges. Desirably, a dry etching method using high-density plasma is employed in this etching. A measure suitable to obtain high-density plasma is etching apparatus that uses microwave or inductively coupled plasma (ICP). Then a low concentration impurity region that overlaps a gate electrode and a high concentration impurity region that functions as a source region or a drain region are formed in the semiconductor film through first doping treatment and second doping treatment. The GOLD structure is obtained by the above processing.
Etching conditions in ICP etching apparatus include the bias power density, the ICP power density, the pressure, the total flow rate of etching gas, and the temperature of lower electrode. The ratio of oxygen added to etching gas also constitutes the etching conditions since etching of the resist is accelerated when oxygen is added to etching gas.
The selective ratio between the resist and the conductive film varies depending on how the etching conditions are set and, in some cases, the width of conductive film fluctuates throughout the substrate surface when the conductive film is processed so as to have its edges tapered. If the GOLD structure is obtained by utilizing a conductive film tapered by etching as described above, the conductive film serves as a mask for introducing an impurity element and therefore the fluctuation in width of conductive film causes fluctuation in channel length and in length of a region where the conductive film overlaps an LDD region. Accordingly, fluctuated width of conductive film causes fluctuation in electric characteristics such as ON current and OFF current between TFTs. Furthermore, the fluctuation in width of conductive film leads to fluctuation in wiring resistance if the conductive film is used as a wiring. The problem of fluctuation in width or length of conductive film becomes increasingly serious as the substrate is increased in size. To avoid fluctuation in width or length of conductive film for enhanced uniformity is therefore a very important object to achieve.